module LED(clk, lock, abus, dbus, we, out);
	parameter BITS;
	parameter BASE;
	
	input clk, lock;
	input [31:0] abus;
	inout [31:0] dbus;
	input we;
	output [(BITS-1):0] out;
	
	reg [(BITS-1):0] LEDRout;
	
	wire addr = (abus == BASE);
	wire write = addr && we;
	wire read = addr && !we;
	wire reset = !lock;
	
	always @(posedge clk or posedge reset) begin
		if (reset) begin
			LEDRout <= {BITS{1'b0}};
		end
		else begin
			if (write) begin
				LEDRout <= dbus[(BITS-1):0];
			end
		end
	end

	assign dbus = read ? {{(32-BITS){1'b0}},LEDRout} : {32{1'bZ}};
	assign out = LEDRout;

endmodule